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HIGH-SPUD MOS GATE ARRAYNAKAYA M; TOMISAWA O; OHKURA I et al.1980; IEEE TRANS. ELECTRON. DEVICES; ISSN 0018-9383; USA; DA. 1980; VOL. 27; NO 8; PP. 1665-1670; BIBL. 10 REF.Article

ELECTRICAL CHARACTERISTICS OF A DSA MOS TRANSISTOR WITH A FINE STRUCTUREONKURA I; TOMISAWA O; OHMORI M et al.1979; I.E.E.E. J. SOLID-STATE CIRCUITS; USA; DA. 1979; VOL. 14; NO 2; PP. 352-357; BIBL. 8 REF.Article

ELECTRICAL CHARACTERISTICS OF A DSA MOS TRANSISTOR WITH A FINE STRUCTUREOHKURA I; TOMISAWA O; OHMORI M et al.1979; I.E.E.E. TRANS. ELECTRON DEVICES; USA; DA. 1979; VOL. 26; NO 4; PP. 430-435; BIBL. 8 REF.Article

VERTICAL INJECTION LOGIC. AN IMPROVED STRUCTURE OF INTEGRATED INJECTION LOGIC.NAKANO T; HORIBA Y; KIJIMA K et al.1977; JAP. J. APPL. PHYS.; JAP.; DA. 1977; VOL. 16; SUPPL. 1; PP. 129-134; BIBL. 14 REF.; (CONF. SOLID STATE DEVICES. 8. PROC.; TOKYO; 1976)Conference Paper

VERTICAL INJECTION LOGIC.NAKANO T; HORIBA Y; YASUOKA A et al.1975; IN: INT. ELECTRON DEVICES MEET.; WASHINGTON, D.C.; 1975; NEW YORK; INST. ELECTR. ELECTRON. ENG.; DA. 1975; PP. 555-558; BIBL. 4 REF.Conference Paper

VERTICAL INJECTION LOGIC.TOMISAWA O; HORIBA Y; KATO S et al.1976; I.E.E.E. J. SOLID-STATE CIRCUITS; U.S.A.; DA. 1976; VOL. 11; NO 5; PP. 637-643; BIBL. 11 REF.Article

A hierarchical standard cell approach for custom VLSI designTOKUDA, T; KOREMATSU, J; TOMISAWA, O et al.IEEE transactions on computer-aided design of integrated circuits and systems. 1984, Vol 3, Num 3, pp 172-177, issn 0278-0070Article

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